A crucial thread in enabling model-based systems engineering (MBSE) for next-generation complex systems is to analyze system architecture by means of simulations and verify requirements continuously during design and development phases. The general steps in this iterative simulation-based design approach are as follows:
- Define system architecture (design model)
- Create a simulation model
- Run the simulation model
- Verify requirements using simulation results
- Refine system architecture and repeat
However, this process often becomes challenging because: (1) system architecture is often defined by system engineers and designers who are not simulation experts and may not have the necessary skills to define and execute simulation models, (2) the communication between system architects and simulation experts is often document-based and hence laborious and error-prone.
Syndeia, our platform for MBE/MBSE, addresses these challenges by providing capabilities to (1) generate simulation models from design models using model transformations, (2) maintain a connection between elements in the design model and simulation model, (3) provide services to compare and synchronize design and simulation models bi-directionally as they evolve concurrently, and (4) reverse engineer design models from simulation models for organizations transitioning to MBSE. We are introducing a new series of technical notes where we exemplify the detailed use cases in this approach with SysML for representing system design and Simulink for representing simulation models
In this series we will highlight various capabilities of Syndeia for using for using MATLAB/Simulink with SysML to coordinate the simulation-based design process of a system. In this series we will outline different scenarios for using Syndeia 2.0 to generate, connect, and compare Simulink and SysML models. Part 1 will show how SysML block and activity structures can be used to generate Simulink model reference structures, including both atomic and multi-signal ports. Part 2 will describe how to generate Simulink models from SysML with specific blocks in the Simulink library that are then executed using a MATLAB script. In Part 3 the reverse will be demonstrated; using Simulink model and block structures to generate SysML block and activity structures. In all three use cases, we will also use the connections created during the generation process to compare and identify changes made on either the SysML side or Simulink side.
In this first installment of the series, we explore the use case where SysML block and activity structures are used to generate a skeletal structure of Simulink models either as an internal block structure with part properties, or an activity structure with call behavior actions. This skeletal model structure, with ports and interfaces defined by the System Engineer in SysML and generated into Simulink, can then be used by a domain engineer with Simulink expertise to flesh out the functional design. Meanwhile, persistent connections between SysML elements and Simulink models will have been created by Syndeia, so that later on as changes are made to either side, we can compare across those connections to show what changes have been made and whether the ports and interfaces remain in sync.
SysML IBD, showing internal block structure to be used for generating a skeletal model in Simulink
Syndeia dashboard showing SysML activity to Simulink model transform
Syndeia dashboard views showing comparison of SysML activity structure with Simulink model (top), the results with no changes made (middle), and the results after making changes to both sides (bottom)
The whitepapers will be published successively over the next few months. Watch this blog page for announcements.